PALO ALTO, Calif. -- Intel on last Monday outlined details for its next-generation Atom system-on-a-chip (SoC) architecture, codenamed "Moorestown," which will open the chip up to whole new markets where Atom previously did not play, such as the fast-growing smartphone sector.

Intel (NASDAQ: INTC) has gotten quite a bit of mileage out of the Atom in its first iteration, deploying the processor to a whole new breed of devices known as netbooks, as well as handheld devices called mobile Internet devices (MIDs). Atom represents the x86 architecture at its most spare design, with one core, very little cache and relatively low clock speeds.

For Moorestown, Intel is going even lower. In a presentation here at the 21st annual Hot Chips conference on the campus of Stanford University, Rajesh Patel, lead architect for the Lincroft system-on-chip at Intel, said that Mooretown would be half the physical size of its predecessor, draw half as much power while in use, and use as much as 50 times less power in an idle state.

This efficiency is gained by using a "low leakage SoC" that partitions the chip into segments, or "islands," where they can be powered down when not in use. This would make it ideal for smartphones, where low power drain during stand-by time is crucial, as iPhone owners have learned.

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